AuthorCommitMessageCommit dateIssues
Vladimir Sementsov-OgievskiyVladimir Sementsov-Ogievskiy
e8a89a0aba9saveSigned-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Richard HendersonRichard Henderson
14f12119aa6MMerge remote-tracking branch 'remotes/vsementsov/tags/pull-jobs-2021-10-07-v2' into stagingmirror: Handle errors after READY cancel v2: add small fix by Stefano, Hanna's series fixed # gpg: Signature made Thu 07 Oct 2021 08:25:07 AM PDT # gpg: using RSA key 8B9C26CDB2FD147C880E86A1561F24C1F19F79FB # gpg: Good signature from "Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: ...
Richard HendersonRichard Henderson
3c019339830MMerge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-20211007' into stagingThird RISC-V PR for QEMU 6.2 - Add Zb[abcs] instruction support - Remove RVB support - Bug fix of setting mstatus_hs.[SD|FS] bits - Mark some UART devices as 'input' - QOMify PolarFire MMUART - Fixes for sifive PDMA - Mark shakti_c as not user creatable # gpg: Signature made Wed 06 Oct 2021 11:42:53 PM PDT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # g...
Hanna ReitzVladimir Sementsov-OgievskiyHanna Reitz
2451f72527diotests: Add mirror-ready-cancel-error testTest what happens when there is an I/O error after a mirror job in the READY phase has been cancelled. Signed-off-by: Hanna Reitz <hreitz@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Tested-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20211006151940.214590-14-hreitz@redhat.com> Signed-off-by: Vladimir Sementsov-Ogievskiy <vsements...
Hanna ReitzVladimir Sementsov-OgievskiyHanna Reitz
a640fa0e381mirror: Do not clear .cancelledClearing .cancelled before leaving the main loop when the job has been soft-cancelled is no longer necessary since job_is_cancelled() only returns true for jobs that have been force-cancelled. Therefore, this only makes a differences in places that call job_cancel_requested(). In block/mirror.c, this is done only before .cancelled was cleared. In job.c, there are two callers: - job_completed...
Hanna ReitzVladimir Sementsov-OgievskiyHanna Reitz
9b230ef93e4mirror: Stop active mirroring after force-cancelOnce the mirror job is force-cancelled (job_is_cancelled() is true), we should not generate new I/O requests. This applies to active mirroring, too, so stop it once the job is cancelled. (We must still forward all I/O requests to the source, though, of course, but those are not really I/O requests generated by the job, so this is fine.) Signed-off-by: Hanna Reitz <hreitz@redhat.com> Reviewed...
Hanna ReitzVladimir Sementsov-OgievskiyHanna Reitz
4feeec7e23bmirror: Check job_is_cancelled() earlierWe must check whether the job is force-cancelled early in our main loop, most importantly before any `continue` statement. For example, we used to have `continue`s before our current checking location that are triggered by `mirror_flush()` failing. So, if `mirror_flush()` kept failing, force-cancelling the job would not terminate it. Jobs can be cancelled while they yield, and once they are ...
Hanna ReitzVladimir Sementsov-OgievskiyHanna Reitz
20ad4d204acmirror: Use job_is_cancelled()mirror_drained_poll() returns true whenever the job is cancelled, because "we [can] be sure that it won't issue more requests". However, this is only true for force-cancelled jobs, so use job_is_cancelled(). Signed-off-by: Hanna Reitz <hreitz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20211006151940...
Hanna ReitzVladimir Sementsov-OgievskiyHanna Reitz
08b83bff2a7job: Add job_cancel_requested()Most callers of job_is_cancelled() actually want to know whether the job is on its way to immediate termination. For example, we refuse to pause jobs that are cancelled; but this only makes sense for jobs that are really actually cancelled. A mirror job that is cancelled during READY with force=false should absolutely be allowed to pause. This "cancellation" (which is actually a kind of comp...
Hanna ReitzVladimir Sementsov-OgievskiyHanna Reitz
401dd096ef9job: Do not soft-cancel after a job is doneThe only job that supports a soft cancel mode is the mirror job, and in such a case it resets its .cancelled field before it leaves its .run() function, so it does not really count as cancelled. However, it is possible to cancel the job after .run() returns and before job_exit() (which is run in the main loop) is executed. Then, .cancelled would still be true and the job would count as cancel...
Hanna ReitzVladimir Sementsov-OgievskiyHanna Reitz
73895f3838cjobs: Give Job.force_cancel more meaningWe largely have two cancel modes for jobs: First, there is actual cancelling. The job is terminated as soon as possible, without trying to reach a consistent result. Second, we have mirror in the READY state. Technically, the job is not really cancelled, but it just is a different completion mode. The job can still run for an indefinite amount of time while it tries to reach a consistent r...
Hanna ReitzVladimir Sementsov-OgievskiyHanna Reitz
4cfb3f05627job: @force parameter for job_cancel_sync()Callers should be able to specify whether they want job_cancel_sync() to force-cancel the job or not. In fact, almost all invocations do not care about consistency of the result and just want the job to terminate as soon as possible, so they should pass force=true. The replication block driver is the exception, specifically the active commit job it runs. As for job_cancel_sync_all(), all cal...
Hanna ReitzVladimir Sementsov-OgievskiyHanna Reitz
1d4a43e9464job: Force-cancel jobs in a failed transactionWhen a transaction is aborted, no result matters, and so all jobs within should be force-cancelled. Signed-off-by: Hanna Reitz <hreitz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20211006151940.214590-5-hreitz@redhat.com> Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Hanna ReitzVladimir Sementsov-OgievskiyHanna Reitz
44716224280mirror: Drop s->syncedAs of HEAD^, there is no meaning to s->synced other than whether the job is READY or not. job_is_ready() gives us that information, too. Suggested-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Signed-off-by: Hanna Reitz <hreitz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Kevin Wolf <kwo...
Hanna ReitzVladimir Sementsov-OgievskiyHanna Reitz
a3810da5cffmirror: Keep s->synced on errorAn error does not take us out of the READY phase, which is what s->synced signifies. It does of course mean that source and target are no longer in sync, but that is what s->actively_sync is for -- s->synced never meant that source and target are in sync, only that they were at some point (and at that point we transitioned into the READY phase). The tangible problem is that we transition to R...
Hanna ReitzVladimir Sementsov-OgievskiyHanna Reitz
d431131439fjob: Context changes in job_completed_txn_abort()Finalizing the job may cause its AioContext to change. This is noted by job_exit(), which points at job_txn_apply() to take this fact into account. However, job_completed() does not necessarily invoke job_txn_apply() (through job_completed_txn_success()), but potentially also job_completed_txn_abort(). The latter stores the context in a local variable, and so always acquires the same context...
Alistair FrancisAlistair Francis
9ae6ecd848dhw/riscv: shakti_c: Mark as not user creatableMark the shakti_c machine as not user creatable. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/639 Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <c617a04d4e3dd041a3427b47a1b1d5ab475a2edd.1632871759.git.alistair.f...
Bin MengAlistair FrancisBin Meng
47b5fbf5a3fhw/dma: sifive_pdma: Don't run DMA when channel is disclaimedIf Control.run bit is set while not preserving the Control.claim bit, the DMA transfer shall not be started. The following result is PDMA tested in U-Boot on Unleashed board: => mw.l 0x3000000 0x0 <= Disclaim channel 0 => mw.l 0x3000000 0x1 <= Claim channel 0 => mw.l 0x3000004 0x55000000 <= wsize = rsize = 5 (2^5 = 32 bytes) => mw.q 0x30...
Bin MengAlistair FrancisBin Meng
b7af62ae2cahw/dma: sifive_pdma: Fix Control.claim bit detectionAt present the codes detect whether the DMA channel is claimed by: claimed = !!s->chan[ch].control & CONTROL_CLAIM; As ! has higher precedence over & (bitwise and), this is essentially claimed = (!!s->chan[ch].control) & CONTROL_CLAIM; which is wrong, as any non-zero bit set in the control register will produce a result of a claimed channel. Fixes: de7c7988d25d ("hw/dma: sifive_pdma: r...
Philippe Mathieu-DaudéAlistair FrancisPhilippe Mathieu-Daudé
31ca70b5ff7hw/char/mchp_pfsoc_mmuart: QOM'ify PolarFire MMUART- Embed SerialMM in MchpPfSoCMMUartState and QOM-initialize it - Alias SERIAL_MM 'chardev' property on MCHP_PFSOC_UART - Forward SerialMM sysbus IRQ in mchp_pfsoc_mmuart_realize() - Add DeviceReset() method - Add vmstate structure for migration - Register device in 'input' category - Keep mchp_pfsoc_mmuart_create() behavior Note, serial_mm_init() calls qdev_set_legacy_instance_id(). This call ...
Philippe Mathieu-DaudéAlistair FrancisPhilippe Mathieu-Daudé
24ce762df7dhw/char/mchp_pfsoc_mmuart: Use a MemoryRegion containerOur device have 2 different I/O regions: - a 16550 UART mapped for 32-bit accesses - 13 extra registers Instead of mapping each region on the main bus, introduce a container, map the 2 devices regions on the container, and map the container on the main bus. Before: (qemu) info mtree ... 0000000020100000-000000002010001f (prio 0, i/o): serial 0000000020100020-000000002010101f (p...
Philippe Mathieu-DaudéAlistair FrancisPhilippe Mathieu-Daudé
284a66a8f6fhw/char/mchp_pfsoc_mmuart: Simplify MCHP_PFSOC_MMUART_REG definitionThe current MCHP_PFSOC_MMUART_REG_SIZE definition represent the size occupied by all the registers. However all registers are 32-bit wide, and the MemoryRegionOps handlers are restricted to 32-bit: static const MemoryRegionOps mchp_pfsoc_mmuart_ops = { .read = mchp_pfsoc_mmuart_read, .write = mchp_pfsoc_mmuart_write, .impl = { .min_access_size = 4, .max_...
Bin MengAlistair FrancisBin Meng
6a03349007fhw/char: sifive_uart: Register device in 'input' categoryThe category of sifive_uart device is not set. Put it into the 'input' category. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210926105003.2716-3-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Bin MengAlistair FrancisBin Meng
5515ff162e8hw/char: shakti_uart: Register device in 'input' categoryThe category of shakti_uart device is not set. Put it into the 'input' category. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210926105003.2716-2-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Bin MengAlistair FrancisBin Meng
34229c46a72hw/char: ibex_uart: Register device in 'input' categoryThe category of ibex_uart device is not set. Put it into the 'input' category. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210926105003.2716-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Frank ChangAlistair FrancisFrank Chang
a88f0402391target/riscv: Set mstatus_hs.[SD|FS] bits if Clean and V=1 in mark_fs_dirty()When V=1, both vsstauts.FS and HS-level sstatus.FS are in effect. Modifying the floating-point state when V=1 causes both fields to be set to 3 (Dirty). However, it's possible that HS-level sstatus.FS is Clean and VS-level vsstatus.FS is Dirty at the time mark_fs_dirty() is called when V=1. We can't early return for this case because we still need to set sstatus.FS to Dirty according to spec. ...
Philipp TomsichAlistair FrancisPhilipp Tomsich
02c1b569a15disas/riscv: Add Zb[abcs] instructionsWith the addition of Zb[abcs], we also need to add disassembler support for these new instructions. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210911140016.834071-17-philipp.tomsich@vrull.eu Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Philipp TomsichAlistair FrancisPhilipp Tomsich
9916ea3c97ftarget/riscv: Remove RVB (replaced by Zb[abcs])With everything classified as Zb[abcs] and pre-0.93 draft-B instructions that are not part of Zb[abcs] removed, we can remove the remaining support code for RVB. Note that RVB has been retired for good and misa.B will neither mean 'some' or 'all of' Zb*: https://lists.riscv.org/g/tech-bitmanip/message/532 Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Richard Henders...
Philipp TomsichAlistair FrancisPhilipp Tomsich
06dfa8a5c5etarget/riscv: Add zext.h instructions to Zbb, removing pack/packu/packhThe 1.0.0 version of Zbb does not contain pack/packu/packh. However, a zext.h instruction is provided (built on pack/packh from pre-0.93 draft-B) is available. This commit adds zext.h and removes the pack* instructions. Note that the encodings for zext.h are different between RV32 and RV64, which is handled through REQUIRE_32BIT. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Revi...
Philipp TomsichAlistair FrancisPhilipp Tomsich
a1095bdcb05target/riscv: Add rev8 instruction, removing grev/greviThe 1.0.0 version of Zbb does not contain grev/grevi. Instead, a rev8 instruction (equivalent to the rev8 pseudo-instruction built on grevi from pre-0.93 draft-B) is available. This commit adds the new rev8 instruction and removes grev/grevi. Note that there is no W-form of this instruction (both a sign-extending and zero-extending 32-bit version can easily be synthesized by following rev8 w...
Philipp TomsichAlistair FrancisPhilipp Tomsich
7e68e6c79b9target/riscv: Add a REQUIRE_32BIT macroWith the changes to Zb[abcs], there's some encodings that are different in RV64 and RV32 (e.g., for rev8 and zext.h). For these, we'll need a helper macro allowing us to select on RV32, as well. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <b...
Philipp TomsichAlistair FrancisPhilipp Tomsich
d7a4fcb0343target/riscv: Add orc.b instruction for Zbb, removing gorc/gorciThe 1.0.0 version of Zbb does not contain gorc/gorci. Instead, a orc.b instruction (equivalent to the orc.b pseudo-instruction built on gorci from pre-0.93 draft-B) is available, mainly targeting string-processing workloads. This commit adds the new orc.b instruction and removed gorc/gorci. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Richard Henderson <richard.hend...
Philipp TomsichAlistair FrancisPhilipp Tomsich
16c38f36f5ctarget/riscv: Reassign instructions to the Zbb-extensionThis reassigns the instructions that are part of Zbb into it, with the notable exceptions of the instructions (rev8, zext.w and orc.b) that changed due to gorci, grevi and pack not being part of Zb[abcs]. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Bin ...
Philipp TomsichAlistair FrancisPhilipp Tomsich
fd4b81a304atarget/riscv: Add instructions of the Zbc-extensionThe following instructions are part of Zbc: - clmul - clmulh - clmulr Note that these instructions were already defined in the pre-0.93 and the 0.93 draft-B proposals, but had not been omitted in the earlier addition of draft-B to QEmu. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alis...
Philipp TomsichAlistair FrancisPhilipp Tomsich
f36a4a89aadtarget/riscv: Reassign instructions to the Zbs-extensionThe following instructions are part of Zbs: - b{set,clr,ext,inv} - b{set,clr,ext,inv}i Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> Message-id: 20210911140016.834071-9-philipp.tomsich@vrull.eu Signed-off-by: Alistair Franc...
Philipp TomsichAlistair FrancisPhilipp Tomsich
628d8c88c14target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B)The Zb[abcs] ratification package does not include the proposed shift-one instructions. There currently is no clear plan to whether these (or variants of them) will be ratified as Zbo (or a different extension) or what the timeframe for such a decision could be. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: ...
Philipp TomsichAlistair FrancisPhilipp Tomsich
dd98a74034atarget/riscv: Remove the W-form instructions from ZbsZbs 1.0.0 (just as the 0.93 draft-B before) does not provide for W-form instructions for Zbs (single-bit instructions). Remove them. Note that these instructions had already been removed for the 0.93 version of the draft-B extention and have not been present in the binutils patches circulating in January 2021. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Richard Hen...
Philipp TomsichAlistair FrancisPhilipp Tomsich
bb4dc158e08target/riscv: Reassign instructions to the Zba-extensionThe following instructions are part of Zba: - add.uw (RV64 only) - sh[123]add (RV32 and RV64) - sh[123]add.uw (RV64-only) - slli.uw (RV64-only) Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> Message-id: 20210911140016.8340...
Philipp TomsichAlistair FrancisPhilipp Tomsich
878dd0e9ac1target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs propertiesThe bitmanipulation ISA extensions will be ratified as individual small extension packages instead of a large B-extension. The first new instructions through the door (these have completed public review) are Zb[abcs]. This adds new 'x-zba', 'x-zbb', 'x-zbc' and 'x-zbs' properties for these in target/riscv/cpu.[ch]. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Richar...
Philipp TomsichAlistair FrancisPhilipp Tomsich
45d1749c1c3target/riscv: clwz must ignore high bits (use shift-left & changed logic)Assume clzw being executed on a register that is not sign-extended, such as for the following sequence that uses (1ULL << 63) | 392 as the operand to clzw: bseti a2, zero, 63 addi a2, a2, 392 clzw a3, a2 The correct result of clzw would be 23, but the current implementation returns -32 (as it performs a 64bit clz, which results in 0 leading zero bits, and then subtracts 32). Fix this by ...
Philipp TomsichAlistair FrancisPhilipp Tomsich
e47fb6c1e96target/riscv: fix clzw implementation to operate on arg1The refactored gen_clzw() uses ret as its argument, instead of arg1. Fix it. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210911140016.834071-3-philipp.tomsich@vrull.eu Fixes: 60903915050 ("target/riscv: Add...
Philipp TomsichAlistair FrancisPhilipp Tomsich
c5b4ee5bb79target/riscv: Introduce temporary in gen_add_uw()Following the recent changes in translate.c, gen_add_uw() causes failures on CF3 and SPEC2017 due to the reuse of arg1. Fix these regressions by introducing a temporary. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Messa...
Richard HendersonRichard Henderson
ca61fa4b803MMerge remote-tracking branch 'remotes/quic/tags/pull-hex-20211006' into stagingChange from Philippe - Use tcg_constant_* Change from Philippe - Remove unused TCG temp Change from Taylor - Probe the stores in a packet at start of commit # gpg: Signature made Wed 06 Oct 2021 08:44:13 AM PDT # gpg: using RSA key 7B0244FB12DE4422 # gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [marginal] # gpg: WARNING: This key is not certified wi...
Richard HendersonRichard Henderson
6723ff639caMMerge remote-tracking branch 'remotes/rth/tags/pull-tcg-20211006' into stagingMore fixes for fedora-i386-cross Add dup_const_tl Expand MemOp MO_SIZE Move MemOpIdx out of tcg.h Vector support for tcg/s390x # gpg: Signature made Wed 06 Oct 2021 08:12:53 AM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" ...
Philippe Mathieu-DaudéTaylor SimpsonPhilippe Mathieu-Daudé
23803bbe524target/hexagon: Use tcg_constant_*Replace uses of tcg_const_* with the allocate and free close together. Inspired-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211003004750.3608983-3-f4bug@amsat.org>
Philippe Mathieu-DaudéTaylor SimpsonPhilippe Mathieu-Daudé
f844f745a81target/hexagon: Remove unused TCG temporary from predicated loadsThe gen_pred_cancel() function, introduced in commit a646e99cb90 (Hexagon macros) doesn't use the 'one' TCG temporary; remove it. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211003004750.3608983-2-f4bug@amsat.org>
Taylor SimpsonTaylor Simpson
c23b5764e79Hexagon (target/hexagon) probe the stores in a packet at start of commitWhen a packet has 2 stores, either both commit or neither commit. At the beginning of gen_commit_packet, we check for multiple stores. If there are multiple stores, call a helper that will probe each of them before proceeding with the commit. Note that we don't call the probe helper for packets with only one store. Therefore, we call process_store_log before anything else involved in committi...
Richard HendersonRichard Henderson
5564f068162MMerge remote-tracking branch 'remotes/kwolf/tags/for-upstream' into stagingBlock layer patches - Fix I/O errors because of incorrectly detected max_iov - Fix not white-listed copy-before-write - qemu-storage-daemon: Only display FUSE help when FUSE is built-in - iotests: update environment and linting configuration # gpg: Signature made Wed 06 Oct 2021 03:58:10 AM PDT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: ...
John SnowKevin WolfJohn Snow
3765315d4c8iotests: Update for pylint 2.11.11. Ignore the new f-strings warning, we're not interested in doing a full conversion at this time. 2. Just mute the unbalanced-tuple-unpacking warning, it's not a real error in this case and muting the dozens of callsites is just not worth it. 3. Add encodings to read_text(). Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo....
John SnowKevin WolfJohn Snow
22968996946iotests/migrate-bitmaps-test: delintMostly uninteresting stuff. Move the test injections under a function named main() so that the variables used during that process aren't in the global scope. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Hanna Reitz <hreitz@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Kevin Wolf ...